Optimal Design Method for Chip-Area-Efficient CMOS Low-Dropout Regulator

Publication Information

Title

Japanese:
English:	Optimal Design Method for Chip-Area-Efficient CMOS Low-Dropout Regulator

Author

Japanese:	池田翔, 伊藤浩之, 石原昇, 益一哉.
English:	Sho Ikeda, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu.

Language

English

Journal/Book name

Japanese:
English:

Volume, Number, Page

Published date

Dec. 4, 2012

Publisher

Japanese:
English:

Conference name

Japanese:
English:	2012 IEEE Asian Pacific Conference on Circuit and Systems

Conference site

Japanese:	高雄
English:	No.1, Ziqiang 3rd Road, Lingya District, kaohsiung

Official URL