Japanese
Home
Search
Horizontal Search
Publication Search
( Advanced Search )
Patent Search
( Advanced Search )
Research Highlight Search
( Advanced Search )
Researcher Search
Search by Organization
Support
FAQ
T2R2 User Registration
Doctoral thesis registration
Support/Contact
About T2R2
What's T2R2?
Operation Guidance
Leaflets
About file disclosure
Related Links
Tokyo Tech
STAR Search
NII IR Program
Home
>
Help
Publication Information
Title
Japanese:
English:
An FPGA-based Scalable Simulation Accelerator for Tile Architectures
Author
Japanese:
高前田 伸也
,
笹河 良介
,
坂口 嘉一
,
吉瀬 謙二
.
English:
Shinya Takamaeda.
,
Ryosuke Sasakawa
,
Yoshito Sakaguchi
,
Kenji Kise
.
Language
English
Journal/Book name
Japanese:
English:
COMPUTURE ARCHITECTURE NEWS
Volume, Number, Page
Vol. 39 No. 4 pp. 38-43
Published date
Sept. 2011
Publisher
Japanese:
English:
Conference name
Japanese:
English:
Internation Workshop on Highly-Efficient Accelerators and Reconfigurable Technologies Hearf2011
Conference site
Japanese:
English:
DOI
https://doi.org/10.1145/2082156.2082166
©2007
Tokyo Institute of Technology All rights reserved.