Hardware-Accelerated Modeling of Large-Scale Networks-on-Chip | Tokyo Tech Research Repository (T2R2)

Publication Information

Title

Japanese:
English:	Hardware-Accelerated Modeling of Large-Scale Networks-on-Chip

Author

Japanese:	Chu Van Thiem.
English:	Thiem Van Chu.

Type

Type:	Thesis (Ph.D.)
Country:	Japan

Language

English

Organization name

Tokyo Institute of Technology

Report number

甲第10994号

Conferred date

2018/09/20

Judge

File

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