A 0.4ps-Jitter -52dBc-Spur Synthesizable Injection-locked PLL with Self-clocked Non-overlap Update and Slope-balanced Sub-sampling BBPD

Publication Information

Title

Japanese:
English:	A 0.4ps-Jitter -52dBc-Spur Synthesizable Injection-locked PLL with Self-clocked Non-overlap Update and Slope-balanced Sub-sampling BBPD

Author

Japanese:	Liu Bangan, ゴーフィクー, 中田憲吾, Deng Wei, Zhang Yuncheng, Qiu Junjun, 吉岡透, 延命潤, Pang Jian, THARAYILNAARAVIND, Zhang Haosheng, Yang Dongsheng, Liu Hanli, 染谷晃基, 白根篤史, 岡田健一.
English:	Bangan Liu, Huy Cu Ngo, Kengo Nakata, Wei Deng, Yuncheng Zhang, Junjun Qiu, Toru Yoshioka, Jun Emmei, Jian Pang, Tn Aravind, Haosheng Zhang, Dongsheng Yang, Hanli Liu, Teruki Someya, Atsushi Shirane, Kenichi Okada.

Language

English

Journal/Book name

Japanese:
English:	IEEE Solid-State Circuits Letters (SSC-L)

Volume, Number, Page

Vol. 2 No. 1 pp. 5-8

Published date

Jan. 2019

Publisher

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English:

Conference name

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English:

Conference site

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English: