Interconnect design challenges in nano CMOS circuit

Publication Information

Title

Japanese:
English:	Interconnect design challenges in nano CMOS circuit

Author

Japanese:	益一哉, Amakawa, S., 伊藤浩之, Ishihara, N..
English:	Kazuya Masu, Amakawa, S., Hiroyuki Ito, Ishihara, N..

Language

English

Journal/Book name

Japanese:
English:	Key Engineering Materials

Volume, Number, Page

Vol. 470 pp. 224-230

Published date

2011

Publisher

Japanese:
English:

Conference name

Japanese:
English:

Conference site

Japanese:
English:

DOI