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Publication Information
Title
Japanese:
English:
Linear time calculation of on-chip power distribution network capacitance considering state-dependence
Author
Japanese:
Hagiwara, S., Yamanaga, K., Takahashi, R.,
ηδΈε
, Sato, T..
English:
Hagiwara, S., Yamanaga, K., Takahashi, R.,
Kazuya Masu
, Sato, T..
Language
English
Journal/Book name
Japanese:
English:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Volume, Number, Page
Vol. E93-A No. 12 pp. 2409-2416
Published date
2010
Publisher
Japanese:
English:
Conference name
Japanese:
English:
Conference site
Japanese:
English:
DOI
https://doi.org/10.1587/transfun.E93.A.2409
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Tokyo Institute of Technology All rights reserved.