Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for AI Applications

Publication Information

Title

Japanese:
English:	Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for AI Applications

Author

Japanese:	M Hashimoto, X Bai, N Banno, M Tada, T Sakamoto, 劉載勲, R Doi, Y Araki, H Onodera, T Imagawa, H Ochi, K Wakabayashi, Y Mitsuyama, T Sugibayashi.
English:	M Hashimoto, X Bai, N Banno, M Tada, T Sakamoto, J Yu, R Doi, Y Araki, H Onodera, T Imagawa, H Ochi, K Wakabayashi, Y Mitsuyama, T Sugibayashi.

Language

English

Journal/Book name

Japanese:
English:

Volume, Number, Page

pp. 502-503

Published date

Feb. 2020

Publisher

Japanese:
English:

Conference name

Japanese:
English:	International Solid-State Circuits Conference

Conference site

Japanese:
English:	San Francisco