A 39GHz CMOS Bi-Directional Doherty Phased-Array Transceiver Using Shared-LUT DPD with Inter-Element Mismatch Compensation Technique for 5G Base-Station

Publication Information

Title

Japanese:
English:	A 39GHz CMOS Bi-Directional Doherty Phased-Array Transceiver Using Shared-LUT DPD with Inter-Element Mismatch Compensation Technique for 5G Base-Station

Author

Japanese:	Li Zheng, Pang Jian, 白根篤史, 岡田健一.
English:	Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada.

Language

English

Journal/Book name

Japanese:
English:

Volume, Number, Page

Published date

Feb. 2021

Publisher

Japanese:
English:

Conference name

Japanese:
English:	IEEE International Solid-State Circuits Conference (ISSCC)

Conference site

Japanese:
English: