A-40-dBc integrated-phase-noise 45-GHz sub-sampling PLL with 3.9-dBm output and 2.1% DC-to-RF efficiency

Publication Information

Title

Japanese:
English:	A-40-dBc integrated-phase-noise 45-GHz sub-sampling PLL with 3.9-dBm output and 2.1% DC-to-RF efficiency

Author

Japanese:	李尚曄, 高野恭弥, 原紳介, 董鋭冰, 天川修平, 吉田毅, 藤島実.
English:	Sangyeop Lee, Kyoya Takano, Shinsuke Hara, Ruibing Dong, Shuhei Amakawa, Takeshi Yoshida, Minoru Fujishima.

Language

English

Journal/Book name

Japanese:
English:

Volume, Number, Page

Published date

June 2019

Publisher

Japanese:
English:

Conference name

Japanese:
English:	IEEE Radio Frequency Integrated Circuits Symposium

Conference site

Japanese:
English: