Normally-off sputtered-MoS2 nMISFETs with TiN top-gate electrode all defined by optical lithography for chip-level integration

Publication Information

Title

Japanese:
English:	Normally-off sputtered-MoS2 nMISFETs with TiN top-gate electrode all defined by optical lithography for chip-level integration

Author

Japanese:	松浦賢太朗, 濱田昌也, 濱田拓也, 谷川晴紀, 坂本拓朗, Atsushi Hori, 宗田伊理也, 川那子高暢, 角嶋邦之, 筒井一生.
English:	Kentaro Matsuura, Masaya Hamada, Takuya Hamada, Haruki Tanigawa, Takuro Sakamoto, Atsushi Hori, Iriya Muneta, Takamasa Kawanago, Kuniyuki Kakushima, Kazuo.

Language

English

Journal/Book name

Japanese:
English:	Japanese Journal of Applied Physics (JJAP) (Rapid Communication)

Volume, Number, Page

Vol. 59 No. 8 Page 80906

Published date

Aug. 2020

Publisher

Japanese:
English:

Conference name

Japanese:
English:

Conference site

Japanese:
English:

DOI