A Power-Efficient 24-71GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36-dB Inter-Band Blocker Rejection for 5G NR,

Publication Information

Title

Japanese:
English:	A Power-Efficient 24-71GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36-dB Inter-Band Blocker Rejection for 5G NR,

Author

Japanese:	Pang Jian, ZHANG Yi, Li Zheng, Tang Minzhe, LIAO YIJING, Fadila Ashbir Aviat, 白根篤史, 岡田健一.
English:	Jian Pang, Yi Zhang, Li Zheng, Minzhe Tang, Yijing Liao, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada.

Language

English

Journal/Book name

Japanese:
English:

Volume, Number, Page

Published date

Feb. 24, 2022

Publisher

Japanese:
English:

Conference name

Japanese:
English:	IEEE International Solid-State Circuits Conference (ISSCC)

Conference site

Japanese:
English:	San Francisco