Experimental demonstration of high-gain CMOS inverter operation at low V dd down to 0.5 V consisting of WSe2 n/p FETs

Publication Information

Title

Japanese:	Experimental demonstration of high-gain CMOS inverter operation at low V dd down to 0.5 V consisting of WSe2 n/p FETs
English:	Experimental demonstration of high-gain CMOS inverter operation at low V dd down to 0.5 V consisting of WSe2 n/p FETs

Author

Japanese:	Takamasa Kawanago, Takahiro Matsuzaki, Ryosuke Kajikawa, Iriya Muneta, 星井拓也, Kuniyuki Kakushima, Kazuo Tsutsui, Hitoshi Wakabayashi.
English:	Takamasa Kawanago, Takahiro Matsuzaki, Ryosuke Kajikawa, Iriya Muneta, Takuya Hoshii, Kuniyuki Kakushima, Kazuo Tsutsui, Hitoshi Wakabayashi.

Language

English

Journal/Book name

Japanese:	Japanese Journal of Applied Physics
English:	Japanese Journal of Applied Physics

Volume, Number, Page

Vol. 61 No. SC pp. SC1004

Published date

May 1, 2022

Publisher

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English:

Conference name

Japanese:
English:

Conference site

Japanese:
English:

Official URL

DOI