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タイトル
和文: 
英文:A 3-dB Quadrature Coupler for 60 GHz Applications Using WLP Technology 
著者
和文: Hamid Kiumarsi, 伊藤 浩之, 石原 昇, 上道 雄介, 千葉 康人, 益一哉.  
英文: Hamid Kiumarsi, Hiroyuki Ito, Noboru Ishihara, Uemichi Yusuke, Yasuto Chiba, Kazuya Masu.  
言語 English 
掲載誌/書名
和文: 
英文: 
巻, 号, ページ         16p-E3-19
出版年月 2012年3月16日 
出版者
和文: 
英文: 
会議名称
和文:2012年春期第59回応用物理学会関連連合講演会 
英文: 
開催地
和文:東京都 
英文: 
公式リンク http://www.jsap.or.jp/activities/annualmeetings/2012spring/index.html
 
アブストラクト The increasingly highly doped, conductive substrates resulting in lossy on-chip passive components is one of the main drawbacks of standard CMOS processes which worsens with moving toward higher frequencies like 60 GHz. Realizing of an on-chip 3-dB quadrature coupler at 60 GHz is impractical due to its large size and hence high loss, though it's a key component in various circuits such as balanced amplifiers and balanced mixers. In this paper for overcoming the problem, we have used WLP (Wafer Level Packaging) technology and proposed a new tandem coupler using offset broadside coupled lines for power combining in 60 GHz band.

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