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和文: 
英文:A Ring-VCO-Based Injection-Locked Frequency Multiplier with Novel Pulse Generation Technique in 65nm CMOS 
著者
和文: 李 尚曄, 金丸 法史, 池田 翔, 上村 龍也, 田野井 聡, 伊藤 浩之, 石原 昇, 益一哉.  
英文: Sangyeop Lee, Norifumi Kanemaru, Sho Ikeda, Tatsuya Kamimura, Satoru Tanoi, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu.  
言語 English 
掲載誌/書名
和文: 
英文:IEICE Transactions 
巻, 号, ページ Vol. E95-C    no. 10    p. 1589-1597
出版年月 2012年10月1日 
出版者
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英文: 
会議名称
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開催地
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公式リンク http://search.ieice.org/
 
DOI https://doi.org/10.1587/transele.E95.C.1589
アブストラクト This paper proposes a low-phase-noise ring-VCO-based frequency multiplier with a new subharmonic direct injection locking technique that only uses a time-delay cell and four MOS transistors. Since the proposed technique behaves as an exclusive OR and can double the reference signal frequency, it increases phase correction points and achieves low phase noise characteristic across the wide output frequency range. The frequency multiplier was fabricated by using 65 nm Si CMOS process. Measured 1-MHz-offset phase noise at 6.34 GHz with reference signals of 528MHz was −119 dBc/Hz.

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