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タイトル
和文: 
英文:Retargeting Derivative-ASIP with Assembly Converter Tool 
著者
和文: ベジョ アグス, 李 冬菊, 一色 剛, 國枝 博昭.  
英文: Agus Bejo, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda.  
言語 English 
掲載誌/書名
和文: 
英文:IEICE Trans. Information and Systems 
巻, 号, ページ Vol. E97-D    No. 5    pp. 1188-1195
出版年月 2014年5月1日 
出版者
和文: 
英文:The Institute of Electronics, Information and Communication Engineers 
会議名称
和文: 
英文: 
開催地
和文: 
英文: 
公式リンク http://search.ieice.org/
 
DOI https://doi.org/10.1587/transinf.E97.D.1188
アブストラクト This paper firstly presents a processor design with Derivative ASIP approach. The architecture of processor is designed by making use of a well-known embedded processor's instruction-set as a base architecture. To improve its performance, the architecture is enhanced with more hardware resources such as registers, interfaces and instruction extensions which might achieve target specifications. Secondly, a new approach for retargeting compiler by means of assembly converter tool is proposed. Our retargeting approach is practical because it is performed by the assembly converter tool with a simple configuration file and independent from a base compiler. With our proposed approach, both architecture flexibility and a good quality of assembly code can be obtained at once. Compared to other compilers, experiments show that our approach capable of generating code as high efficiency as its base compiler and the developed ASIP results in better performance than its base processor.

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