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KHANULLAH 研究業績一覧 (10件)
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論文
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ARIF ULLAH KHAN,
Tsuyoshi Isshiki,
Dongju Li,
Hiroaki Kunieda.
Efficient Design Exploration Framework of SW/HW Systems Based on Tightly-Coupled Thread Model,
IPSJ Trans. System LSI Design Methodology,
Vol. 8,
pp. 38-50,
Feb. 2015.
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Hao Xiao,
TSUYOSHI ISSHIKI,
ARIF ULLAH KHAN,
DONGJU LI,
hiroaki kunieda.
A Low-Cost and Energy-Effcient Multiprocessor System-on-Chip for UWB MAC Layer,
IEICE Transaction on Information and Systems,
Vol. E95-D,
No. 8,
Aug. 2012.
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ARIF ULLAH KHAN,
TSUYOSHI ISSHIKI,
DONGJU LI,
hiroaki kunieda.
A Unified Performance Estimation Method for Hardware and Software Components in Multiprocessor System-On-Chips,
IPSJ Transactions on System LSI Design Methodology,
情報処理学会,
Vol. 3,
pp. 194 - 206,
Aug. 2010.
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Mohammad Zalfany Urfianto,
TSUYOSHI ISSHIKI,
ARIF ULLAH KHAN,
DONGJU LI,
hiroaki kunieda.
Decomposition of Task-Level Concurrency on C Programs Applied to the Design of Multiprocessor SoC,
IEICE Trans. Fundamentals,
Vol. E91-A,
No. 7,
pp. 1748 - 1756,
July 2008.
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Mohammad Zalfany Urfianto,
Tsuyoshi Isshiki,
Arif Ullah Khan,
Dongju Li,
Hiroaki Kunieda.
A Multiprocessor SoC Architecture with Efficient Communication Infrastructure and Advanced Compiler Support for Easy Application Development,
IEICE transaction on Fundamentals,
Vol. E91-A,
No. 4,
pp. 1185-1196,
Apr. 2008.
国際会議発表 (査読有り)
国内会議発表 (査読なし・不明)
学位論文
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A Software-Hardware Integration Framework for Multiprocessor System-On-Chip Based on Tightly-Coupled Thread Model,
Thesis,
博士(学術),
Tokyo Institute of Technology,
2014/12/31,
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A Software-Hardware Integration Framework for Multiprocessor System-On-Chip Based on Tightly-Coupled Thread Model,
Exam Summary,
博士(学術),
Tokyo Institute of Technology,
2014/12/31,
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A Software-Hardware Integration Framework for Multiprocessor System-On-Chip Based on Tightly-Coupled Thread Model,
Summary,
博士(学術),
Tokyo Institute of Technology,
2014/12/31,
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