論文

• Sho Ikeda, Hiroyuki Ito, Akifumi Kasamatsu, Yosuke Ishikawa, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shinsuke Hara, Dong Ruibing, Shiro Dosho, Noboru Ishihara, Kazuya Masu. A -244-dB FOM High-Frequency Piezoelectric Resonator-Based Cascaded Fractional-N PLL With Sub-ppb-Order Channel-Adjusting Technique, IEEE Journal of Solid-State Circuits, IEEE, Jan. 2017.

国際会議発表 (査読有り)

• Yosuke Ishikawa, Sho Ikeda, Hiroyuki Ito, Akifumi Kasamatsu, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shinsuke Hara, Dong Ruibing, Shiro Dosho, Noboru Ishihara, Kazuya Masu. Design of high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique, Design Automation Conference (ASP-DAC), 2017 22nd Asia and South Pacific, IEEE, Feb. 2017.
• Sho Ikeda, Hiroyuki Ito, Akifumi Kasamatsu, Yosuke Ishikawa, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shinsuke Hara, Ruibing Dong, Shiro Dosho, Noboru Ishihara, Kazuya Masu. An 8.865-GHz -244dB-FOM High-Frequency Piezoelectric Resonator-Based Cascaded Fractional-N PLL with Sub-ppb-Order Channel Adjusting Technique, 2016 Symposium on VLSI Circuits, p. 234-235, June 2016.  公式リンク  
  

国内会議発表 (査読なし・不明)

• 池田 翔, 伊藤 浩之, 笠松 章史, 石川 洋介, 小原 崇義, 野口 直記, 紙透 航志, Yao Jiyang, 原 紳介, 董 鋭冰, 道正 志郎, 石原 昇, 益 一哉. An 8.865-GHz -244dB-FOM High-Frequency Piezoelectric Resonator-Based Cascaded Fractional-N PLL with Sub-ppb-Order Channel Adjusting Technique, Symposium on VLSI Circuits 2016報告会, June 2016.  公式リンク  
  

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