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Publication List - Shuichiro Yamamoto 2011 (10 / 220 entries)
Journal Paper
International Conference (Reviewed)
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Y. Shuto,
S. Yamamoto,
S. Sugahara.
Nonvolatile SRAM based on spin-transistor architecture for nonvolatile power-gating systems,
International Symposium on Advanced Hybrid Nano Devices (IS-AHND): Prospects by World’s Leading Scientists,
Oct. 2011.
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S. Yamamoto,
Y. Shuto,
S. Sugahara.
Nonvolatile power-gating FPGAs based on spin-transistor architecture,
International Symposium on Advanced Hybrid Nano Devices (IS-AHND): Prospects by World’s Leading Scientists,
Oct. 2011.
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Y. Shuto,
S. Yamamoto,
S. Sugahara.
Evaluation and control of break-even time for nonvolatile SRAM using pseudo-spin-MOSFETs wit spin-transfer-torque MTJs,
IEEE International Magnetics Conference 2011 (INTERMAG),
Apr. 2011.
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S. Yamamoto,
Y. Shuto,
S. Sugahara.
Application of NV-DFF and NV-SRAM using spin-transistor Architecture with spin transfer torque MTJs to nonvolatile power-gating FPGA,
IEEE International Magnetics Conference 2011 (INTERMAG),
Apr. 2011.
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S. Yamamoto,
Y. Shuto,
S. Sugahara.
Power-gating ability and power aware design of nonvolatile delay flip-flop using spin-transistor architecture with spin transfer torque MTJs,
IEEE International Magnetics Conference 2011 (INTERMAG),
Apr. 2011.
Domestic Conference (Not reviewed / Unknown)
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SATOSHI SUGAHARA,
Yusuke Shuto,
Shuu'ichirou Yamamoto.
CMOS/スピントロニクス融合技術による不揮発性ロジックシステムの展望,
電子情報通信学会技術研究報告「磁気記録・情報ストレージ」,
pp. 63-70,
Oct. 2011.
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Shuu'ichirou Yamamoto,
SATOSHI SUGAHARA.
抵抗変化素子を用いたばらつき補償CMOSゲート,
2010年春季 第57回応用物理学関係連合講演会,
Sept. 2011.
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Yusuke Shuto,
Shuu'ichirou Yamamoto,
SATOSHI SUGAHARA.
擬似スピンMOSFETを用いた不揮発性SRAM:スリープ時リーク電流削減効果,
第72回秋季応用物理学会学術講演会,
Aug. 2011.
Other Publication
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