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Publication List - Kenji Kise 2015 (28 / 382 entries)
Journal Paper
International Conference (Reviewed)
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Tomohiro Misono,
Ryohei Kobayashi,
Shimpei Sato,
Kenji Kise.
Effective Parallel Simulation of ArchHDL under Manycore Environment,
International Symposium on Computing and Networking -Across Practical Development and Thieretical Research (CANDAR),
pp. 140-146,
Dec. 2015.
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Yuki Matsuda,
Ryosuke Sasakawa,
Kenji Kise.
A Challenge for an Efficient AMI-Based Cache System on FPGA Soft Processor,
International Symposium on Computing and Networking -Across Practical Development and Thieretical Research (CANDAR),
pp. 133-139,
Dec. 2015.
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Tomohiro Yoneda,
Masashi Imai,
Hiroshi Saito,
Kenji Kise.
Dependable real-Time Task Execution Scheme for a Many-Core Platform,
International Symposium on Defect and Fault Tolerance in VLSI and nanotechnologh Systems (DFT2015),
Oct. 2015.
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Ryohei Kobayashi,
Kenji Kise.
FACE: Fast and Customizable Sorting Accelerator for Heterogeneous Many-core Systems,
IEEE 9th International Symposium on Embedded Multicore SoCs (MCSoC-15),
pp. 49-56,
Sept. 2015.
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Eri Ogawa,
Yuki Matsuda,
Tomohiro Misono,
Ryohei Kobayashi,
Kenji Kise.
Reconfigurable IBM PC Compatible SoC for Computer Architecture Education and Research,
IEEE 9th International Symposium on Embedded Multicore SoCs (MCSoC-15),
pp. 65-72,
Sept. 2015.
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Eri Ogawa,
Yuki Matsuda,
Tomohiro Misono,
Ryohei Kobayashi,
Kenji Kise.
Reconfigurable IBM PC Compatible SoC for Computer Architecture Education and Research,
IEEE 9th International Symposium on Embedded Multicore SoCs (MCSoC-15),
pp. 65-72,
Sept. 2015.
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Thiem Van Chu,
Shimpei Sato,
Kenji Kise.
Ultra-Fast NoC Emulation on a Single FPGA,
The 25th International Conference on Field Programmable Logic and Applications (FPL 2015),
Sept. 2015.
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Thiem Van Chu,
Shimpei Sato,
Kenji Kise.
Enabling Fast and Accurate Emulation of Large-scale Network on Chip Architectures on an Single FPGA (short paper),
The 23rd IEEE International Symposium on Field-Programmable Custrom Conputing Machines (FCCM 2015),
pp. 60-63,
May 2015.
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Takuma Usui,
Ryohei KObayashi,
Kenji Kise.
A Challenge of Portable and High-speed FPGA Accelerator (short paper),
The 11th International Symposium on Applied Reconfigurable Computing (ARC 2015),
pp. 383-392,
Apr. 2015.
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Shimpei Sato,
Kenji Kise.
ArchHDL: A Novel Hardware RTL Design Environment in C++,
The 11th International Symposium on Applied Reconfirurable Computing (ARC 2015),
pp. 53-64,
Apr. 2015.
International Conference (Not reviewed / Unknown)
Domestic Conference (Not reviewed / Unknown)
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Kairi Okumura,
Ryohei Kobayashi,
Kenji Kise.
SDD内の並列性を引き出すI/Oスケジューラ,
情報処理学会SIGOS,
Nov. 2015.
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Ryohei Kobayashi,
Kenji Kise.
FPGAを用いた世界最速のソーティングハードウェアの実現に向けた試み,
電子情報通信学会研究報告RECONF2015,
pp. 65-70,
June 2015.
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Ryohei Kobayashi,
Kenji Kise.
FPGAベースのソーティングアクセラレータの設計と実装,
電子情報通信学会研究報告CRSY2015,
pp. 25-30,
Apr. 2015.
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Kairi Okumura,
Kenji Kise.
Linuxコンテナ稼動環境のための斬新な資源管理,
情報処理学会第77回全国大会,
Mar. 2015.
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Kenji Kise.
コンピューティングシステム・アーキテクチャ研究とハードウエア試作,
電子情報通信学会北陸支部講演会,
Mar. 2015.
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Kenji Kise.
コンピュータアーキテクチャ研究とハードウエア試作,
電子情報通信学会 機能集積情報システム研究会,
Mar. 2015.
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Takuma Usui,
Kenji Kise.
手軽な外付けFPGAアクセラレータによるソーティングの高速化,
情報処理学会第77回全国大会,
Mar. 2015.
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Eri Ogawa,
Kenji Kise.
Linuxの動くFPGAシステムを3倍速くする試み,
情報処理学会第77回全国大会,
Mar. 2015.
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Tomohiro Misono,
Kenji Kise.
System Software Of A Future Computer System With Mesh Interconnect,
情報処理学会第77回全国大会,
Mar. 2015.
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Ryohei Kobayashi,
Kenji Kise.
Ultra High-speed FPGA Accelerator for Sorting Application,
情報処理学会第77回全国大会,
Mar. 2015.
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Thiem Van Chu,
Kenji Kise.
A Novel Time-Division Multiplexing Approach for Emulation NoC Architectures on FPGAs,
情報処理学会第77回全国大会,
Mar. 2015.
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Haruka Mori,
Kenji Kise.
DRAMリソースに着目したメニーコアソフトプロセッサの性能チューニング,
情報処理学会第77回全国大会,
Mar. 2015.
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Yuki Matsuda,
Eri Ogawa,
Tomohiro Misono,
Naoki Fujieda,
市川 周一,
Kenji Kise.
MieruSys プロジェクト:複数のFPGAを用いた先進的な計算機システムの開発,
電子情報通信学会研究報告RECONF2015,
pp. 211-216,
Jan. 2015.
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Takuma Usui,
Ryohei Kobayashi,
Kenji Kise.
USB3.0接続の手軽で高速なFPGAアクセラレータの設計と実装,
電子情報通信学会研究報告RECONF2015,
pp. 205-210,
Jan. 2015.
Other Publication
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Kenji Kise.
英文論文誌小特集号「Specila Section on Solid-State Circuit Design - Architecture, Circuit, Device and Design Methodology」発行によせて(寄稿),
電子情報通信学会 エレクトロニクスソサイエティ ニュースレター,
No. 160,
p. 7,
Apr. 2015.
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佐藤 喬,
岩田 満,
小早川 倫広,
横井 健,
Kenji Kise.
MieruEMBを用いたコンピュータ教育‐MieruEMBの作製‐,
論文集「高専教育」,
Vol. 38,
pp. 1-6,
Mar. 2015.
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