Journal Paper

• Tn Aravind, Makihiko Katsuragi, Kento Kimura, Satoshi Kondo, Korkut Kaan Tokgoz, Kengo Nakata, Wei Deng, Kenichi Okada, Akira Matsuzawa. A Fractional-N Sub-Sampling PLL Using a Pipelined Phase-Interpolator with an FoM of -250dB, IEEE Journal of Solid-State Circuits, IEEE, Vol. 51, No. 7, pp. 1630-1640, July 2016.
• Teerachot Siriburanon, Satoshi Kondo, Makihiko Katsuragi, Hanli Liu, Kento Kimura, Wei Deng, Kenichi Okada, Akira Matsuzawa. A Low-Power Low-Noise mm-Wave Sub-Sampling PLL using Dual-Step-Mixing ILFD and Tail-Coupling Quadrature Injection-Locked Oscillator for IEEE802.11ad, IEEE Journal of Solid-State Circuits, IEEE, Vol. 51, No. 5, pp. 1246-1260, May 2016.

International Conference (Reviewed)

• Tharayil Narayanan Aravind, Makihiko Katsuragi, Kengo Nakata, Yuki Terashima, Kenichi Okada, Akira Matsuzawa. A Noise Reduction Technique for Divider-Less Fractional-N Frequency Synthesizer using Phase-Interpolation Technique, IEEE ACM Asia South Pacific Design Automation Conference, Jan. 2016.

Domestic Conference (Not reviewed / Unknown)

• Makihiko Katsuragi, Kenichi Okada, Akira Matsuzawa. Push-Push Doubler を用いた20GHz帯VCOの低位相雑音化, 電子情報通信学会 総合大会, C-12-4, Mar. 2016.

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