論文

• Junjun Qiu, Zheng Sun, Bangan Liu, Wenqian Wang, Dingxin Xu, Hans Herdian, Hongye Huang, Yuncheng Zhang, Yun Wang, Jian Pang, Hanli Liu, Masaya Miyahara, Atsushi Shirane, Kenichi Okada. A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth, IEEE Journal of Solid-State Circuits, IEEE, Vol. 56, No. 12, pp. 3741-3755, Dec. 2021.
• Zheng Sun, Hanli Liu, Dingxin Xu, Hongye Huang, Bangan Liu, Zheng Li, Jian Pang, Teruki Someya, Atsushi Shirane, Kenichi Okada. A Low-Jitter Injection-Locked Clock Multiplier Using 97-µW Transformer-Based VCO with 18-kHz Flicker Noise Corner, IEICE Transactions on Electronics, Vol. E104-C, No. 7, pp. 289-299, July 2021.
• Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Rattanan Saengchan, Ashbir Aviat Fadila, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Rui Wu, Yun Wang, Dongwon You, Bangan Liu, Zheng Sun, Yuncheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, T. Kaneko, Atsushi Shirane, Kenichi Okada. A CMOS Dual-Polarized Phased-Array Beamformer Utilizing Cross-Polarization Leakage Cancellation for 5G MIMO Systems, IEEE Journal of Solid-State Circuits, IEEE, Vol. 56, No. 4, pp. 1310-1326, Apr. 2021.
• Zheng Sun, Dingxin Xu, Hongye Huang, Zheng Li, Hanli Liu, Bangan Liu, Jian Pang, Teruki Someya, Atsushi Shirane, Kenichi Okada. A Compact TF-based LC-VCO with Ultra-Low-Power Operation and Supply Pushing Reduction for IoT Applications, IEICE Transactions on Electronics, Vol. E103-C, No. 10, pp. 505-513, Oct. 2020.
• Jian Pang, Zheng Li, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Takeshi Nakamura, Joshua Alvin, Daiki Matsumoto, Bangan Liu, Aravind Tharayil Narayanan, Junjun Qiu, Hanli Liu, Zheng Sun, Hongye Huang, Korkut Kaan Tokgoz, K. Motoi, N. Oshima, S. Hori, K. Kunihiro, T. Kaneko, A. Shirane, K. Okada. A 28-GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR, IEEE Journal of Solid-State Circuits, Vol. 55, No. 9, pp. 2371-2386, Sept. 2020.
• Bangan Liu, Yuncheng Zhang, Junjun Qiu, Hongye Huang, Zheng Sun, Dingxin Xu, Haosheng Zhang, Yun Wang, Jian Pang, Zheng Li, Xi Fu, Atsushi Shirane, Hitoshi Kurosu, Yoshinori Nakane, Shunichiro Masaki, Kenichi Okada. A Fully-Synthesizable Fractional-N Injection-Locked PLL for Digital Clocking with Triangle/Sawtooth Spread-Spectrum Modulation Capability in 5-nm CMOS, IEEE Solid-State Circuits Letters, Vol. 3, pp. 34-37, Jan. 2020.
• Hanli Liu, Zheng Sun, Hongye Huang, Wei Deng, Teerachot Siriburanon, Jian Pang, Yun Wang, Rui Wu, Teruki Someya, Atsushi Shirane, Kenichi Okada. A 265-µW Fractional-N Digital PLL with Seamless Automatic Switching Sub-sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS, IEEE Journal of Solid-State Circuits (JSSC), Vol. 54, No. 12, pp. 3478-3492, Dec. 2019.
• Jian Pang, Rui Wu, Yun Wang, Masato Dome, Hisashi Kato, Hongye Huang, Tn Aravind, Hanli Liu, Bangan Liu, Takeshi Nakamura, Takuya Fujimura, Masaru Kawabuchi, Ryo Kubozoe, Tsuyoshi Miura, Daiki Matsumoto, Zheng Li, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada. A 28GHz CMOS Phased-Array Transceiver Based on LO Phase Shifting Architecture with Gain Invariant Phase Tuning for 5G New Radio, IEEE Journal of Solid-State Circuits (JSSC), Vol. 54, No. 5, pp. 1228-1242, May 2019.
• Hanli Liu, Zheng Sun, Dexian Tang, Hongye Huang, Tohru Kaneko, Zhijie Chen, Wei Deng, Rui Wu, Kenichi Okada. A DPLL-Centric Bluetooth Low-Energy Transceiver with a 2.3-mW Interference-Tolerant Hybrid-Loop Receiver in 65nm CMOS, IEEE Journal of Solid-State Circuits, Vol. 53, No. 12, pp. 3672-3687, Dec. 2018.

国際会議発表 (査読有り)

• Dingxin Xu, Zezheng Liu, Yifeng Kuai, Hongye Huang, Yuncheng Zhang, Zheng Sun, Bangan Liu, Wenqian Wang, Yuang Xiong, Junjun Qiu, Waleed Madany, Yi Zhang, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada. A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated Jitter, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2024.
• Waleed Madany, Yuncheng Zhang, Ashbir Aviat Fadila, Hongye Huang, Junjun Qiu, Atsushi Shirane, Kenichi Okada. A Fully Synthesizable DPLL with Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation Path, IEEE European Solid-State Circuits Conference (ESSCIRC), Sept. 2023.
• Dingxin Xu, Yuncheng Zhang, Hongye Huang, Zheng Sun, Bangan Liu, Ashbir Aviat Fadila, Junjun Qiu, Zezheng Liu, Wenqian Wang, Yuang Xiong, Waleed Madany, Atsushi Shirane, Kenichi Okada. A 6.5-to-8GHz Cascaded Dual-Fractional-N Digital PLL Achieving -63.7dBc Fractional Spurs with 50MHz Reference, IEEE Custom Integrated Circuits Conference (CICC), Apr. 2023.
• Junjun Qiu, Wenqian Wang, Zheng Sun, Bangan Liu, Yuncheng Zhang, Dingxin Xu, Hongye Huang, Ashbir Aviat Fadila, Zezheng Liu, Waleed Madany, Yuang Xiong, Atsushi Shirane, Kenichi Okada. A 32kHz-Reference 2.4GHz Fractional-N Nonuniform Oversampling PLL with Gain Boosted PD and Loop Gain Calibration, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2023.
• . Zheng Sun, Dingxin Xu, Junjun Qiu, Zezheng Liu, Yuncheng Zhang, Hongye Huang, Hanli Liu, Bangan Liu, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada. A 0.25mm2 BLE Transmitter with Direct Antenna Interface and 19% System Efficiency Using Duty-Cycled Edge-Timing Calibration, IEEE European Solid-State Circuits Conference (ESSCIRC), Sept. 2021.
• Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Weichu Chen, Yun Wang, Dongwon You, Zheng Sun, Yuncheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada. "A Fast-Beam-Switching 28-GHz Phased-Array Transceiver Supporting Cross-Polarization Leakage Self-Cancellation,, IEEE Symposium on VLSI Circuits (VLSI Circuits), June 2021.
• Junjun Qiu, Zheng Sun, Bangan Liu, Wenqian Wang, Dingxin Xu, Hans Herdian, Hongye Huang, Yuncheng Zhang, Yun Wang, Atsushi Shirane, Kenichi Okada. A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2021.
• Zheng Li, Jian Pang, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Joshua Alvin, Bangan Liu, Zheng Sun, Hongye Huang, Atsushi Shirane, Kenichi Okada. A 28GHz CMOS Differential Bi-Directional Amplifier for 5G NR, IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), Jan. 2020.
• Zheng Sun, Hanli Liu, Dingxin Xu, Hongye Huang, Bangan Liu, Zheng Li, Jian Pang, Teruki Someya, Atsushi Shirane, Kenichi Okada. A 78fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO, IEEE European Solid-State Circuits Conference (ESSCIRC), Sept. 2019.
• Hanli Liu, Zheng Sun, Hongye Huang, Wei Deng, Teerachot Siriburanon, Jian Pang, Yun Wang, Rui Wu, Teruki Someya, Atsushi Shirane, Kenichi Okada. A 265-µW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS, IEEE International Solid-State Circuits Conference (ISSCC), pp. 256-257, Feb. 2019.
• Jian Pang, Zheng Li, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Takeshi Nakamura, Joshua Alvin, Daiki Matsumoto, Tn Aravind, Bangan Liu, Hanli Liu, Zheng Sun, Hongye Huang, Korkut Kaan Tokgoz, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada. A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR, IEEE International Solid-State Circuits Conference (ISSCC), pp. 344-345, Feb. 2019.
• Zheng Sun, Hanli Liu, Dexian Tang, Hongye Huang, Tohru Kaneko, Rui Wu, Wei Deng, Kenichi Okada. A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver, IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 310-313, Sept. 2018.
• Jian Pang, Rui Wu, Yun Wang, Masato Dome, Hisashi Kato, Hongye Huang, Tn Aravind, Hanli Liu, Wei Deng, Bangan Liu, Takeshi Nakamura, Takuya Fujimura, Masaru Kawabuchi, Ryo Kubozoe, Tsuyoshi Miura, Daiki Matsumoto, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Kenichi Okada. A 28GHz CMOS Phased-Array Transceiver Using Gain-Invariant LO Phase Shifter with 0.1 Degree Beam-Steering Resolution for 5G New Radio, IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 56-59, June 2018.
• Hanli Liu, Zheng Sun, Dexian Tang, Hongye Huang, Tohru Kaneko, Wei Deng, Rui Wu, Kenichi Okada, Akira Matsuzawa. An ADPLL-Centric Bluetooth Low-Energy Transceiver with 2.3mW Interference-Tolerant Hybrid-Loop Receiver and 2.9mW Single-Point Polar Transmitter in 65nm CMOS, IEEE International Solid-State Circuits Conference, Feb. 2018.

国内会議発表 (査読なし・不明)

• Zezheng Liu, Hongye Huang, Yuncheng Zhang, 白根 篤史, 岡田 健一. A Nonlinearity Compensation Technique for Digital-to-Time Converter in All-Digital PLLs, 電子情報通信学会 総合大会, Mar. 2024.
• Daxu Zhang, Yuncheng Zhang, Hongye Huang, Dingxin Xu, 白根 篤史, 岡田 健一. A Multi-Phase Frequency Synthesizer with Injection-Locking Ring Oscillator, 電子情報通信学会 総合大会, Mar. 2024.
• Waleed Madany, Hongye Huang, Bangan Liu, 白根 篤史, 岡田 健一. A Fully Synthesizable DPLL for Spread Spectrum Clock Generation, 電子情報通信学会 総合大会, Mar. 2024.
• Zezheng Liu, Hongye Huang, Yuncheng Zhang, 白根 篤史, 岡田 健一. A Nonlinearity Compensation Technique for Digital-to-Time Converter in All-Digital PLLs, 電子情報通信学会 総合大会, Mar. 2024.
• Yuncheng Zhang, Zheng Sun, Bangan Liu, Junjun Qiu, Dingxin Xu, Yi Zhang, Xi Fu, Dongwon You, Hongye Huang, Waleed Madany, Ashbir Aviat Fadila, Zezheng Liu, Wenqian Wang, Yuang Xiong, Atsushi Shirane, Kenichi Okada. A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit DSM and Transformer Combined FIR, IEEE SSCS Japan Chapter VLSI Circuits報告会, July 2023.
• Dingxin Xu, Zheng Sun, Hongye Huang, 白根 篤史, 岡田 健一. A Current-Reused Ring Oscillator with Edge-Combining Technique for BLE TX, 電子情報通信学会 集積回路研究会, Dec. 2022.
• Junjun Qiu, Zheng Sun, Bangan Liu, Wenqian Wang, Dingxin Xu, Hans Herdian, Hongye Huang, Yuncheng Zhang, Yun Wang, Atsushi Shirane, Kenichi Okada. 200kHzループ帯域幅の32kHzリファレンス2.4GHzフラクショナルNオーバーサンプリングPLL, 電子情報通信学会 LSIとシステムのワークショップ, May 2021.
• Zheng Sun, Dingxin Xu, Hongye Huang, 染谷 晃基, 白根 篤史, 岡田 健一. A 78fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO, 電子情報通信学会 ソサイエティ大会, Sept. 2019.
• Dingxin Xu, Zheng Sun, Hongye Huang, 染谷 晃基, 白根 篤史, 岡田 健一. A Time-Amplifier Gain Calibration Technique for ADPLL, 電子情報通信学会 ソサイエティ大会, Sept. 2019.
• Hongye Huang, Hanli Liu, Zheng Sun, Dingxin Xu, 染谷 晃基, 白根 篤史, 岡田 健一. A 2.4GHz Low-Power Subsampling/Sampling-Mixed Fractional-N All-Digital PLL, 電子情報通信学会 ソサイエティ大会, Sept. 2019.
• Zheng Sun, Hanli Liu, Dexian Tang, Hongye Huang, 金子 徹, Rui Wu, Wei Deng, 染谷 晃基, 白根 篤史, 岡田 健一. A T/R Switch Embedded BLE Transceiver with 2.6mW Harmonic-Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver」,, 電子情報通信学会 LSIとシステムのワークショップ, May 2019.
• Dingxin Xu, Hanli Liu, Zheng Sun, Hongye Huang, Wei Deng, Teerachot Siriburanon, Jian Pang, Yun Wang, Rui Wu, 染谷 晃基, 白根 篤史, 岡田 健一. A 265-µW Fractional-N Digital PLL with Switching Subsampling/Sampling Feedback, 電子情報通信学会 LSIとシステムのワークショップ, May 2019.
• Hongye Huang, Hanli Liu, Zheng Sun, Teruki Someya, Atsushi Shirane, Kenichi Okada. An Energy-Saving Digital-to-Time Converter for Ultra-Low-Power Digital PLLs, 電子情報通信学会 集積回路研究会, Vol. ICD2018-116, No. 507, pp. 87-91, Mar. 2019.
• Hanli Liu, Zheng Sun, Hongye Huang, Wei Deng, Teerachot Siriburanon, Pang Jian, Yun Wang, Rui Wu, 染谷 晃基, Atsushi Shirane, Kenichi Okada. A 265-µW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS, IEEE SSCS Japan Chapter ISSCC報告会, Mar. 2019.
• Pang Jian, Zheng Li, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Takeshi Nakamura, Joshua Alvin, Daiki Matsumoto, Tn Aravind, Bangan Liu, Hanli Liu, Zheng Sun, Hongye Huang, Korkut Kaan Tokgoz, 大島 直樹, 元井 桂一, 堀 真一, 國弘 和明, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada. A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR, IEEE SSCS Japan Chapter ISSCC報告会, Mar. 2019.
• Jian Pang, Zheng Li, 窪添 諒, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, 中村 岳資, Joshua Alvin, 松本 大輝, THARAYILNAARAVIND, Bangan Liu, Junjun Qiu, Hanli Liu, Zheng Sun, Hongye Huang, 白根 篤史, 岡田 健一. 双方向動作可能な5GNR二偏波MIMO対応28GHz帯CMOSフェーズドアレイ無線機, 電子情報通信学会 集積回路研究会, Vol. ICD2018-106, No. 507, pp. 31-35,, Mar. 2019.
• Zheng Sun, Hanli Liu, Dexian Tang, Hongye Huang, Tohru Kaneko, Rui Wu, Wei Deng, Teruki Someya, Atsushi Shirane, Kenichi Okada. A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver, 電子情報通信学会 集積回路研究会, Vol. ICD2018-115, No. 507, pp. 81-85, Mar. 2019.
• Hongye Huang, Zheng Sun, Hanli Liu, Rui Wu, Teruki Someya, Atsushi Shirane, Kenichi Okada. A 2.6mW BLE Transmitter Front-End with Fully-Passive Harmonic Suppression, 電子情報通信学会 ソサイエティ大会, Sept. 2018.
• Zheng Sun, Hanli Liu, Hongye Huang, Teruki Someya, Atsushi Shirane, Kenichi Okada. A High Dynamic Range BLE Front-End with On-Chip Matching Network, 電子情報通信学会 ソサイエティ大会, Sept. 2018.
• Zheng Sun, Hanli Liu, Dexian Tang, Hongye Huang, 金子 徹, Wei Deng, Rui Wu, 白根 篤史, 岡田 健一. An ADPLL-Centric Bluetooth Low-Energy Transceiver with 2.3mW Interference-Tolerant Hybrid-Loop Receiver in 65nm CMOS, 電子情報通信学会 LSIとシステムのワークショップ, May 2018.
• Hongye Huang, Hanli Liu, Dexian Tang, Zheng Sun, Wei Deng, Huy Cu Ngo, 白根 篤史, 岡田 健一. An Ultra-Low-Power Fractional-N All-Digital PLL Using 10-bit Isolated Constant-Slope Digital-to-Time Converter, 電子情報通信学会 LSIとシステムのワークショップ, May 2018.
• Zheng Sun, Hanli Liu, Dexian Tang, Hongye Huang, Kenichi Okada, Akira Matsuzawa. An ADPLL-based High Interference Tolerant BLE Receiver with DAC Feedback Loop, 電子情報通信学会 総合大会, C-12-6, Mar. 2018.
• Hongye Huang, Zheng Sun, Hanli Liu, Dexian Tang, Kenichi Okada, Akira Matsuzawa. Current-reuse LNA for Low Power 2.4-GHz Receivers, 電子情報通信学会 総合大会, C-12-7, Mar. 2018.
• Dexian Tang, Hanli Liu, Zheng Sun, Hongye Huang, Kenichi Okada, Akira Matsuzawa. An Isolated Constant-slope Digital-to-Time Converter, 電子情報通信学会 総合大会, C-12-33, Mar. 2018.

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