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Publication List - Kazuya Masu 2001 (9 / 1030 entries)
Journal Paper
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T. Tsushima,
Y. Yokoyama,
K. Masu.
CMOS Differential Driver Circuit with Source Follower for GHz Clock Transmission Interconnect in Si ULSI,
Advanced Metallization Conference 2001: Asian Session,
pp. 50-51,
2001.
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Y. Yokoyama,
T. Tsushima,
K. Masu.
GHz Clock Distribution Using Transmission Line Interconnect - New Criteria for Circuit Evaluation,
Advanced Metallization Conference 2001: Asian Session,
2001.
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N. Takagi,
H. Shinoki,
K. Masu.
Estimation of Power Consumption Using Interconnect Length Distribution in System LSI,
Advanced Metallization Conference (AMC) 2001,
2001.
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H. Shinoki,
N. Takagi,
K. Masu.
Interconnect Length Distribution for Memory-Logic Mixed LSI,
Advanced Metallization Conference (AMC) 2001,
2001.
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N. Takagi,
H. Shinoki,
T. Tsushima,
Y. Yokoyama,
K. Masu.
Interconnect Length Distribution in Si System ULSI,
2001 International Conference on Solid State Devices and Materials,
pp. 54-55,
2001.
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Y. Yokoyama,
T. Tsushima,
H. Shinoki,
N. Takagi,
K. Masu.
GHz Clock Distribution Using Transmission Line Interconnect and CMOS Differential Driver Circuit in Si ULSI,
2001 International Conference on Solid State Devices and Materials,
pp. 58-59,
2001.
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Kenji Togura,
Hiroyuki Nakase,
Koji Kubota,
Kazuya Masu,
Kazuo Tsubouchi.
Low Power Current-Cut Switched-Current Matched Filter for CDMA,
IEICE Trans. Electron.,
Vol. E84-C,
No. 2,
pp. 212-219,
2001.
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チャン ホーワン,
対馬朋人,
横山佳巧,
益 一哉.
「Si ULSIにおけるGHzクロック分配回路」RC分布定数線路と伝送線路の比較,
電子情報通信学会技術報告,
Vol. SDM2001,
No. 182,
pp. 49-53,
2001.
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対馬朋人,
横山佳巧,
Felix Chan Hou Wan,
益 一哉.
Si ULSIにおける伝送線路を用いたGHzクロック分配と駆動回路の設計,
電子情報通信学会技術報告書(デザインガイア2001),
Vol. 101,
No. 468,
pp. 27-31,
2001.
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