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Publication List - Jaehoon Yu 2021 (8 / 28 entries)
Journal Paper
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Shungo Kumazawa,
Kazushi Kawamura,
Thiem Van Chu,
Masato Motomura,
Jaehoon Yu.
ExtraFerns: Fully Parallel Ensemble Learning Technique with Random Projection and Non-Greedy yet Minimal Memory Access Training,
International Journal of Networking and Computing,
July 2021.
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Junnosuke Suzuki,
Tomohiro Kaneko,
Kota Ando,
Kazutoshi Hirose,
Kazushi Kawamura,
Thiem Van Chu,
Masato Motomura,
Jaehoon Yu.
ProgressiveNN: Achieving Computational Scalability with Dynamic Bit-Precision Adjustment by MSB-first Accumulative Computation,
International Journal of Networking and Computing,
July 2021.
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Kazutoshi Hirose,
Shinya Takamaeda-Yamazaki,
Jaehoon Yu,
Masato Motomura.
Selective Fine-Tuning on a Classifier Ensemble: Realizing Adaptive Neural Networks With a Diversified Multi-Exit Architecture,
IEEE Access,
Vol. 9,
pp. 6179-6187,
Jan. 2021.
International Conference (Reviewed)
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Thiem Van Chu,
Ryuichi Kitajima,
Kazushi Kawamura,
Jaehoon Yu,
Masato Motomura.
A High-Performance and Flexible FPGA Inference Accelerator for Decision Forests Based on Prior Feature Space Partitioning,
International Conference on Field-Programmable Technology,
Dec. 2021.
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Angel Lopez Garcia-Arias,
Masanori Hashimoto,
Masato Motomura,
Jaehoon Yu.
Hidden-Fold Networks: Random Recurrent Residuals Using Sparse Supermasks,
The British Machine Vision Conference,
Nov. 2021.
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Kota Ando,
Jaehoon Yu,
Kazutoshi Hirose,
Hiroki Nakahara,
Kazushi Kawamura,
Thiem Van Chu,
Masato Motomura.
Edge Inference Engine for Deep & Random Sparse Neural Networks with 4-bit Cartesian-Product MAC Array and Pipelined Activation Aligner,
Hot Chips,
Aug. 2021.
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Takashi Imagawa,
Jaehoon Yu,
Masanori Hashimoto,
Hiroyuki Ochi.
MUX Granularity Oriented Iterative Technology Mapping for Implementing Compute-Intensive Applications on Via-Switch FPGA,
Design, Automation and Test in Europe Conference (DATE),
Feb. 2021.
Patent
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