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上野修一 2011年 研究業績一覧 (14件 / 254件)
論文
国際会議発表 (査読有り)
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Yiqiang Sheng,
Atsushi Takahashi,
Shuichi Ueno.
RRA-Based Multi-Objective Optimization to Mitigate the Worst Cases of Placement,
Proc. IEEE 9th International Conference on ASIC (ASICON 2011),
pp. 357-360,
Oct. 2011.
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ANISH MAN SINGH SHRESTHA,
Satoshi Tayu,
Shuichi UENO.
Bandwidth of Convex Bipartite Graphs and Related Graphs,
International Computing and Combinatorics Conference,
Springer Verlarg, Lecture Notes in Computer Science,
Vol. 6842,
pp. 307-318,
Aug. 2011.
公式リンク
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Yiqiang Sheng,
Atsushi Takahashi,
Shuichi Ueno.
Relay-Race Algorithm: A Novel Heuristic Approach to VLSI/PCB Placement,
Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2011),
pp. 96-101,
July 2011.
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ANISH MAN SINGH SHRESTHA,
Satoshi Tayu,
Shuichi UENO.
Bandwidth of Convex Bipartite Graphs and Related Graphs (Extended Abstract),
the 7th Hungarian-Japanese Symposium on Discrete Mathematics and Its Applications,
Proceedings of the 7th Hungarian-Japanese Symposium on Discrete Mathematics and Its Applications,
pp. 381-388,
May 2011.
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Satoshi Tayu,
Masayoshi Arai,
Shuichi UENO.
On the Energy-Aware Mapping for NoCs,
The 2011 International Conference on Information and Communication Technology for Embedded Systems,
Proceedings of the 2011 International Conference on Information and Communication Technology for Embedded Systems,
pp. 192-194,
Jan. 2011.
公式リンク
国内会議発表 (査読有り)
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Yiqiang Sheng,
Atsushi Takahashi,
Shuichi Ueno.
A Stochastic Optimization Method to Solve General Placement Problem Effectively,
Proc. DA Symposium 2011, IPSJ Symposium Series,
Vol. 2011,
No. 5,
pp. 27-32,
Aug. 2011.
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Tomoki Yamada,
Satoshi Tayu,
Shuichi UENO.
On Efficient Universal Quantum Circuits,
2011 IEICE General Conference,
Proceedings of the 2011 IEICE General Conference,
Institute of Electronics, Information and Communication Engineers,
No. A-1-25,
Mar. 2011.
国内会議発表 (査読なし・不明)
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Satoshi Tayu,
Tomoki Yamada,
Shuichi UENO.
On Efficient Universal Quantum Circuits,
Technical Report of the IEICE,
Institute of Electronics, Information and Communication Engineers,
Vol. 111,
No. 293,
pp. 1-6,
Nov. 2011.
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Yiqiang Sheng,
Atsushi Takahashi,
Shuichi Ueno.
An Improved Simulated Annealing for 3D Packing with Sequence Triple and Quintuple Representations,
Technical Committee on VLSI Design Technologies,
IEICE Technical Report (VLD2011-88),
Vol. 111,
No. 324,
pp. 209-214,
Nov. 2011.
公式リンク
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Kousuke Nishikawa,
Satoshi Tayu,
Shuichi UENO.
A Note on the Maximum Balanced Biclique Problem,
2011 IEICE Society Conference,
Proceedings of the 2011 IEICE Society Conference,
No. A-1-14,
Sept. 2011.
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Yiqiang Sheng,
Atsushi Takahashi,
Shuichi Ueno.
MSA: Mixed Stochastic Algorithm for Placement with Larger Solution Space,
Technical Committee on VLSI Design Technologies,
IEICE Technical Report (VLD2011-42),
Vol. 111,
No. 216,
pp. 11-16,
Sept. 2011.
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Satoshi Tayu,
Katsuya Imai,
Shuichi UENO.
A Note on the Subtree Isomorphism Problem,
2011 IEICE Society Conference,
Proceedings of the 2011 IEICE Society Conference,
No. A-1-13,
Sept. 2011.
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Masayoshi Arai,
Satoshi Tayu,
Shuichi UENO.
On the Energy-Aware Mapping for NoCs,
Technical Report of the IEICE,
Institute of Electronics, Information and Communication Engineers,
Vol. 110,
No. 389,
pp. 87-92,
Jan. 2011.
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