Journal Paper

• Zezhong Wang, Hiroto Nakayama, Masayuki Shimoda, Atsushi Takahashi, Kosuke Yanagidaira, Chikaaki Kodama. UEO Channel Routing Algorithm to Alleviate Local Congestion for Generalized Channels, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E108-A, No. 9, pp. 1241-1250, Sept. 2025.
• Hiroyoshi Tanabe, Masayuki Shimoda, Atsushi Takahashi. Rigorous electromagnetic simulator for extreme ultraviolet lithography and convolutional neural network reproducing electromagnetic simulations, Journal of Micro/Nanopatterning, Materials and Metrology (JM3), Vol. 24, issue 2, May 2025.
• Masayuki Shimoda, Atsushi Takahashi. Gridless Gap Channel Routing with Variable-width Wires, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E108-A, No. 3, pp. 517-524, Mar. 2025.
• Zezhong Wang, Masayuki Shimoda, Atsushi Takahashi. SDG Channel Routing to Minimize Wirelength for Generalized Channel, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E108-A, No. 3, pp. 500-508, Mar. 2025.
• Masayuki Shimoda, Atsushi Takahashi. Gridless Gap Channel Routing to Minimize Wirelength, IPSJ Transactions on System and LSI Design Methodology, Vol. 18, pp. 2-9, Feb. 2025.  Official location  

International Conference (Reviewed)

• Masayuki Shimoda, Atsushi Takahashi, Kosuke Yanagidaira, Mikiko Hirai, Toshikazu Watanabe, Toshimitsu Iwasawa, Chikaaki Kodama. Gap Channel Routing with Fixed Wires, Proc. IEEE International Symposium on Circuits and Systems (ISCAS '25), May 2025.

Domestic Conference (Reviewed)

• Emuun Purevdagva, Masayuki Shimoda, Satoshi Tayu, Atsushi Takahashi. Small-Area Droplet Routing Algorithm for MEDA-Based DMFB, Proc. DA Symposium 2025, IPSJ Symposium Series, pp. 113-119, Aug. 2025.  Official location  
• Moe Sugiyama, Hiroyoshi Tanabe, Masayuki Shimoda, Atsushi Takahashi. Curvilinear Mask Pattern Generation for CNN Training to Accelerate EUV Lithography Simulation, Proc. DA Symposium 2025, IPSJ Symposium Series, pp. 106-112, Aug. 2025.  Official location  
• Haruki Numajiri, Masayuki Shimoda, Satoshi Tayu, Atsushi Takahashi. Feasible Track Assignment Conditions with their Application in Two-Layer Bottleneck Channel Routing, Proc. DA Symposium 2025, IPSJ Symposium Series, pp. 12-18, Aug. 2025.  Official location  

Domestic Conference (Not reviewed / Unknown)

• Masayuki Shimoda, Atsushi TAKAHASHI, 栁平康輔, 平井美紀子, 渡邉寿和, 岩澤利光, 児玉親亮. 障害物を考慮したグリッドレス配線アルゴリズムの提案, Technical Committee on VLSI Design Technologies, IEICE Technical Report (VLD2025-13), Vol. 125, No. 78, pp. 63-68, June 2025.
• Masayuki Shimoda, Atsushi Takahashi, 栁平康輔, 児玉親亮. VLSI物理設計におけるギャップチャネル配線問題, Proc. the 2025 IEICE General Conference (A-6-02), Vol. A, p. 35, Mar. 2025.
• Yo Sakakura, Satoshi Tayu, Masayuki Shimoda, Atsushi Takahashi. A Note on 4-Layer U-shape Bottleneck Channel Routing, Technical Committee on VLSI Design Technologies, IEICE Technical Report (VLD2024-108), Vol. 124, No. 400, pp. 31-36, Mar. 2025.
• Emuun Purevdagva, Masayuki Shimoda, Satoshi Tayu, Atsushi Takahashi. Fast Droplet Routing Algorithm for MEDA-Based DMFB, Technical Committee on VLSI Design Technologies, IEICE Technical Report (VLD2024-105), Vol. 124, No. 400, pp. 13-18, Mar. 2025.
• Masayuki Shimoda, Atsushi Takahashi, Kosuke Yanagidaira, Mikiko Hirai, Toshikazu Watanabe, Toshimitsu Iwasawa, Chikaaki Kodama. Global Routing for CBA-based 3D Flash Memory, Technical Committee on VLSI Design Technologies, IEICE Technical Report (VLD2024-82), Vol. 124, No. 329, pp. 33-40, Jan. 2025.

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