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Publication List - Shunsuke Ikeda (24 entries)
Journal Paper
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M. Kashiwano,
J. Hirai,
S. Ikeda,
M. Fujimatsu,
Y. Miyamoto.
High Open-Circuit Voltage Gain in Vertical InGaAs Channel Metal–Insulator–Semiconductor Field-Effect Transistor Using Heavily Doped Drain Region and Narrow Channel Mesa,
JPN. J. APPL. PHYS.,
vol. 54,
no. 4,
issue 2,
2013.
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Atsushi Kato,
Toru Kanazawa,
Shunsuke Ikeda,
Yosiharu Yonai,
Yasuyuki Miyamoto.
Reduction of access resistance of InP/InGaAs composite-channel MOSFET with back source electrode,
IEICE Trans. Electron.,
vol. E95-C,
no. 5,
pp. 904-919,
May 2012.
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R. Terao,
T. Kanazawa,
S. Ikeda,
Y. Yonai,
A. Kato,
Y. Miyamoto.
InP/InGaAs Composite MOSFETs with Regrown Source and Al2O3 gate dielectric Exhibiting Maximum Drain Current Exceeding 1.3 mA/μm,
Applied Phys. Exp.,
The Japan Society of Applied Physics,
vol. 4,
no. 5,
054201,
Apr. 2011.
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Toru Kanazawa,
kazuya wakabayashi,
Hisashi Saito,
Ryousuke Terao,
Shunsuke Ikeda,
YASUYUKI MIYAMOTO,
KAZUHITO FURUYA.
Submicron InP/InGaAs Composite-Channel Metal–Oxide–Semiconductor Field-Effect Transistor with Selectively Regrown n+-Source,
Applied Physics Express,
Vol. 3,
No. 9,
094201,
Sept. 2010.
International Conference (Reviewed)
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M. Kashiwano,
J. Hirai,
S. Ikeda,
M. Fujimatsu,
Y. Miyamoto.
High Open Circuit Voltage Gain in Vertical InGaAs Channel Metal-Insulator-Semiconductor Field-Effect Transistor using Heavily Doped Drain Region and Narrow Channel Mesa,
2012 International Conference on. Solid State Devices and Materials (SSDM 2012),
Sept. 2012.
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Jun Hirai,
Tomoki Kususaki,
Shunsuke Ikeda,
YASUYUKI MIYAMOTO.
Vertical InGaAs MOSFET with HfO2 gate,
2012 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices(AWAD 2012),
2012.
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T. Kanazawa,
R. Terao,
S. Ikeda,
Y. Miyamoto.
MOVPE-regrown source/drain regions for III-V MOSFETs with high drain current of 1.28 A/mm,
23rd Int. Conf. Indium Phosphide and Related Materials (IPRM2011),
Sept. 2011.
Official location
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A. Kato,
T. Kanazawa,
S. Ikeda,
Y. Yonai,
YASUYUKI MIYAMOTO.
Reduction of Access Resistance of InP/InGaAs Composite-Channel MOSFET with A Back Source Electrode,
2011 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices(AWAD),
Sept. 2011.
Official location
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Yosiharu Yonai,
Toru Kanazawa,
Shunsuke Ikeda,
YASUYUKI MIYAMOTO.
High Drain Current (>2A/mm) InGaAs channel MOSFET at VD=0.5V with Shrinkage of Channel Length by InP Anisotropic Etching,
2011 IEEE International Electron Devices Meeting (IEDM 2011),
2011.
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Toru Kanazawa,
Ryousuke Terao,
Yuutarou Yamaguchi,
Shunsuke Ikeda,
Yosiharu Yonai,
YASUYUKI MIYAMOTO.
InP/InGaAs MOSFET with Back-Electrode Structure Bonded on Si Substrate Using a BCB Adhesive Layer,
2010 International Conference on Solid State Devices and Materials,
pp. 129-130,
Sept. 2010.
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T. Kanazawa,
K. Wakabayashi,
H. Saito,
R. Terao,
T. Tajima,
S. Ikeda,
Y. Miyamoto,
K. Furuya.
Submicron InP/InGaAs composite channel MOSFETs with selectively regrown n+-source/drain buried in channel undercut,
22nd Int. Conf. Indium Phosphide and Related Materials,
June 2010.
International Conference (Not reviewed / Unknown)
Domestic Conference (Not reviewed / Unknown)
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Masashi Kashiwano,
Jun Hirai,
Shunsuke Ikeda,
Motohiko Fujimatsu,
YASUYUKI MIYAMOTO.
半導体ドレイン層及び狭チャネルメサ幅による縦型 InGaAs チャネル MISFET の高電圧利得化,
第 73 回応用物理学会学術講演会,
Sept. 2012.
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Masashi Kashiwano,
Jun Hirai,
Shunsuke Ikeda,
Motohiko Fujimatsu,
YASUYUKI MIYAMOTO.
半導体ドレイン層及び狭チャネルメサ幅による縦型InGaAsチャネルMISFETの高電圧利得化,
電子情報通信学会技術研究報告,
May 2012.
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Masashi Kashiwano,
Jun Hirai,
Shunsuke Ikeda,
Motohiko Fujimatsu,
YASUYUKI MIYAMOTO.
GaN HEMT のソース・ドレイン間容量のデバイスシミュレーションによる解析,
電子情報通信学会2011年総合大会,
Mar. 2012.
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Yosiharu Yonai,
Toru Kanazawa,
Shunsuke Ikeda,
YASUYUKI MIYAMOTO.
InPエッチング異方性による微細InGaAsチャネルMOSFET,
応用物理学会 2012年度春季大会,
Mar. 2012.
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Shunsuke Ikeda,
Toru Kanazawa,
YASUYUKI MIYAMOTO.
電子ランチャを持つInGaAs MOSFETにおけるヘテロ障壁高さ依存性,
電子情報通信学会2011年ソサイエティ大会,
Sept. 2011.
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Toru Kanazawa,
Ryousuke Terao,
Yuutarou Yamaguchi,
Shunsuke Ikeda,
Yosiharu Yonai,
atsushi kato,
YASUYUKI MIYAMOTO.
裏面電極を有するⅢ-Ⅴ族量子井戸型チャネルMOSFET,
電子情報通信学会電子デバイス研究会,
Jan. 2011.
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Toru Kanazawa,
Ryousuke Terao,
Yuutarou Yamaguchi,
Shunsuke Ikeda,
Yosiharu Yonai,
atsushi kato,
YASUYUKI MIYAMOTO.
InP/InGaAs MOSFET with back-gate electrode bonded on Si substrate,
第71回応用物理学会学術講演会,
Sept. 2010.
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Ryousuke Terao,
Toru Kanazawa,
Shunsuke Ikeda,
Yosiharu Yonai,
atsushi kato,
YASUYUKI MIYAMOTO.
Submicron InP/InGaAs channel n-MOSFET with regrown InGaAs and Al2O3 gate dielectric,
第71回応用物理学会学術講演会,
Sept. 2010.
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Ryousuke Terao,
Toru Kanazawa,
Hisashi Saito,
kazuya wakabayashi,
Shunsuke Ikeda,
YASUYUKI MIYAMOTO,
KAZUHITO FURUYA.
Al2O3ゲート絶縁膜を用いたInP/InGaAsチャネル n-MOSFETの電気特,
第57回応用物理学関係連合研究会,
Mar. 2010.
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kazuya wakabayashi,
Toru Kanazawa,
Hisashi Saito,
Ryousuke Terao,
Shunsuke Ikeda,
YASUYUKI MIYAMOTO,
KAZUHITO FURUYA.
再成長ソースを有するサブミクロンInP/InGaAs nMOSFETの電流電圧特性,
第57回応用物理学関係連合研究会,
Mar. 2010.
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Toru Kanazawa,
kazuya wakabayashi,
Hisashi Saito,
Ryousuke Terao,
Tomonori Tajima,
Shunsuke Ikeda,
YASUYUKI MIYAMOTO,
KAZUHITO FURUYA.
III-V族サブミクロンチャネルを有する高移動度MOSFET,
電気学会電子デバイス研究会,
Mar. 2010.
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Toru Kanazawa,
kazuya wakabayashi,
Hisashi Saito,
Ryousuke Terao,
Tomonori Tajima,
Shunsuke Ikeda,
YASUYUKI MIYAMOTO,
KAZUHITO FURUYA.
InP/InGaAs composite channel MOSFET with Al2O3 gate dielectric,
IEICE Technical Report, Electron Devices,
IEICE Technical Report, Electron Devices,
Vol. 109,
No. 360,
pp. 39-42,
Jan. 2010.
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